发明名称 BUS REQUEST SELECTION SYSTEM
摘要 PURPOSE:To determine the priority in each block through the execution of a program, give the right of bus use to the devices in each block according to the degree of emergency and give the right of bus use securely even to the devices with low urgency by providing a bus arbiter which has a timer, priority selecting circuit, logical circuit, etc. CONSTITUTION:The bus 11 of a bus request selection system is provided with one request line REQ through which respective devices transmit bus request signals, a polling line POL for displaying bus request origins, a selection line SEL for determining a bus using device, a busy line BSY for showing that the respective devices use the bus individually, and data lines. The respective devices and bus arbiter 12 are connected to this bus 11, and the line REQ is connected to an OR circuit 17 connected to a timer 16. Further, a priority selecting circuit 22 is connected to the data lines D0-Dn, and an FF27, AND circuit 20, etc., are connected to the line BSY. Then, a latch circuit 23 and other logical circuits are used to select priority through the execution of the program according to urgency, and the right of bus use is given to even devices with low urgency.
申请公布号 JPS59220820(A) 申请公布日期 1984.12.12
申请号 JP19830095257 申请日期 1983.05.30
申请人 FUJITSU KK 发明人 AWAJI TOSHIO
分类号 G06F13/366;G06F3/00 主分类号 G06F13/366
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