| 摘要 |
<p>A serial parallel type A-D converting device having high accuracy and a simplified multi-stage configuration for correcting errors caused by d.c. drift or gain drift in a preceding stage, so as to obviate overloading in a succeeding stage, by means of offering previously a unidirectional level offset to a digital signal converted in the preceding stage, and correspondingly in the succeeding stage, expanding unidirectionally the dynamic range of an A-D converter, and shifting the level of a digital signal converted from an input analog signal deviating out of a normal range by an amount corresponding to the lowest bit of the digital signal converted in the preceding stage, wherein the level offset offered previously is removed later by adding a carry or by subtracting a borrow formed by the A-D converter in the succeeding stage.</p> |
