Test system memory architecture for passing parameters and testing dynamic components

摘要

A test system memory architecture for passing parameters and testing dynamic components includes a main memory 15, a mask memory 20, and a definition memory 25, operating under control of a main sequence control memory 18. A corresponding subroutine memory 38, subroutine mask memory 22, and subroutine definition memory 27 operate under control of a subroutine sequence control memory 33. Multiplexing apparatus is used to selectively connect any of these memories to the formatter circuit 10. In addition, the architecture includes a parameter enabling memory 30 which is coupled to the subroutine SCM 33 and a switching means for controlling which of the subroutine memory 38 or main memory 15 is coupled to the formatter circuit 10.