CMOS/SOS transistor gate array apparatus

摘要

A universal gate array is illustrated using a specific pattern of CMOS (Complementary Metal Oxide Silicon) Transistors in an array which provides a high degree of board utilization in the layout of small runs of integrated circuits where the high cost of completely customized boards is unacceptable. The array comprises a continuing pattern of two sets of three (3) series connected transistors in a cell surrounded on all four sides by cells each containing two single transistor gates of each channel type.