发明名称 SIGNAL RECEIVER
摘要 PURPOSE:To use a zero-cross or level-cross number counting method to simplify a receiver by providing a read-only memory which inputs the >=1 higher bits of the output of the 1st register as an address and the 2nd register which inputs part or all of the output of the read-only memory. CONSTITUTION:An input signal from an input terminal 1 is latched in the input register 10 of the signal receiver and the >=1 higher bit of the output of the register 10 is regarded as a part of the address input to the read-only memory 11. Further, a part or all of the output of the memory 11 is inputted to the 2nd register 12, the output of the register 12 is inputted as a part of the address input to the memory 11. A part of the output of this memory 11 is outputted as a reception output from an output terminal 7. A memory replaces the register 12 to perform a multiple circuit processing. Then, the zero-cross or level-cross number counting method is employed to simplify the constitution of the receiver.
申请公布号 JPS6081950(A) 申请公布日期 1985.05.10
申请号 JP19830190496 申请日期 1983.10.12
申请人 NIPPON DENKI KK 发明人 FUKUI AKIRA
分类号 H04L27/00;H04L27/14;H04L27/156;(IPC1-7):H04L27/00 主分类号 H04L27/00
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