| 摘要 |
PURPOSE:To prevent contention of output data even in a memory system consisting of plural memory chips sharing an output line, by resetting output data on a basis of a signal obtained by exclusive OR operation between a row address strobe signal and a column address strobe signal. CONSTITUTION:When an inverted column address strobe signal CAS becomes low-level once after an inverted row address strobe signal RAS becomes low- level, output data Dout is outputted a prescribed time after the fall of this inverted signal CAS. This output data Dout is reset by the fall of a signal EOR obtained by exclusive OR operation the row address strobe signal and the column address strobe signal. Thus, the time width of output data is extended while keeping compatibiliy with a conventional dynamic random access memory.
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