发明名称 Subscriber line interface circuit having an impedance synthesizer.
摘要 A subscriber line interface circuit described wherein a pair of line terminals are connected to a subscriber loop and a pair of output terminals are connected to a telecommunication exchange. A first amplifier is provided having a first pair of input terminals coupled to the line terminals and a second pair of input terminals. The first amplifier has a unity gain over a path from the input terminals of the first pair to said output terminals and a gain K over a path from the terminals of the second pair to said output terminals. A pair of reference resistors are cross-coupled from said output terminals to the line terminals, each of the reference resistors having a resistance Ro. A second amplifier is connected from the line terminals to the terminals of the second pair, the second amplifier having a transfer function -Ro/KxZt, where Zt is an impedance to be synthesized across the line terminals.
申请公布号 EP0147230(A2) 申请公布日期 1985.07.03
申请号 EP19840309078 申请日期 1984.12.27
申请人 NEC CORPORATION 发明人 HIRATA, HIDEYUKI C/O NEC CORP.
分类号 H03H11/40;H03F1/48;H03H11/46;H04M19/00;H04Q3/42 主分类号 H03H11/40
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