发明名称 MEMORY PROTECTION SYSTEM
摘要 PURPOSE:To prevent rewrite of a written data by providing a write suppressing means to a memory chip written in already in writing to a memory comprising plural memory chips. CONSTITUTION:In writing a data to the memory 1 (M1-M16), a control section 2 outputs a data D, write signal W, chip selection signal C and a pulse P. While an address counter (10<6>-adic) 3 is driven by the pulse P, the address of the memory chip M1 is selected sequentially and the data D is written. When an address counter 3 counts out, a carry signal C is outputted and fed to an up terminal UP of an up-down counter (hexadecimal) 14. Thus, a signal level at the output terminal E1 of an AND gate G1 goes to ''0'' and the write is inhibited to the memory chip M1.
申请公布号 JPS60140449(A) 申请公布日期 1985.07.25
申请号 JP19830249370 申请日期 1983.12.27
申请人 FUJITSU KK 发明人 TANIGUCHI TOORU;ICHIKI TOORU;TOMIZAWA SHINICHI
分类号 G06F12/14;G06F12/16;G06F21/02 主分类号 G06F12/14
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