发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To enable the complete element isolation in a memory cell and the yield of large effect of soft error by a method wherein the element isolation of memory cells in a well is carried out by means of a field insulation film and the well. CONSTITUTION:The well 43 is formed in the memory cell part on a P<-> type Si substrate 41. Next, an SiO2 film 44 and an Si3N4 45 are formed on the element- forming part of the substrate 41. Then, the memory cell part is covered with a resist 46, and a channel cut part 47 is formed in the peripheral circuit part by using the cell part and the pattern of the film 45 as a mask. The substrate 41 is exposed by removing the resist 46, and a field region 48 is formed on both the periphery and the memory cell part. The surface of the element-forming part of the substrate 41 is successively coated with a gate oxide film 49 and a gate polycrystalline Si layer 50, which are then patterned into a gate electrode form. This construction allows formation of no channel cut regions in the memory cell array in the well 43 and enables the increase in well concentration and the secure countermeasure against soft error by interelement isolation by means of the field oxide region.
申请公布号 JPS60182761(A) 申请公布日期 1985.09.18
申请号 JP19840037830 申请日期 1984.02.29
申请人 FUJITSU KK 发明人 TAKEMAE YOSHIHIRO;NAKANO TOMIO;NAKANO MASAO;SATOU KIMIAKI
分类号 H01L27/10;H01L21/76;H01L21/8242;H01L27/108 主分类号 H01L27/10
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