发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve surge withstanding voltage by mounting a protective transistor introducing charges generated by applying surge voltage to a grounding point between a power supply terminal for a circuit constituted by an MOS transistor having LDD structure and the grounding point. CONSTITUTION:When surge voltage is applied to a high-voltage power supply terminal 19, an avalanche breakdown is generated on the interface B between the surface of a semiconductor substrate 11 and an N<-> type impurity region 13, and electron-hole pairs are produced. Electrons are absorbed to the drain D side and holes flow in the direction of the substrate, substrate currents are generated, the P type semiconductor substrate 11 in the vicinity of a sources is biassed in the forward direction, and a parasitic bipolar transistor QB using an N<+> type impurity region 122 as a collector, an N<+> type impurity region 121 as an emitter and the P type semiconductor substrate 11 as a base is brought to an ON state. The source S is grounded, and surge voltage applied to the voltage supply terminal 19 is discharged rapidly. The surge voltage of an LDD type MOS transistor is improved.
申请公布号 JPS60207383(A) 申请公布日期 1985.10.18
申请号 JP19840063686 申请日期 1984.03.31
申请人 TOSHIBA KK 发明人 TANAKA SUMIO;ATSUMI SHIGERU;TOZAWA CHIKASUMI;TSUSHIMA TOSHIKI;OKUDA TAIZOU;ASANO MASAMICHI
分类号 H03F1/52;G11C5/14;G11C7/00;G11C7/24;H01L21/8234;H01L21/8238;H01L21/8247;H01L27/02;H01L27/088;H01L27/092;H01L29/10;H01L29/73;H01L29/78;H01L29/788;H01L29/792;H02H7/20;H03F1/42 主分类号 H03F1/52
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