发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To speed up the circuit action by a method wherein impurity layers to inhibit the elongation of a depletion layer due to drain voltage are partly formed only in a semiconductor substrate in the neighborhood of the side wall of a gate electrode. CONSTITUTION:The first impurity layers 25a and 25b of the second conductivity type are formed by introducing an impurity to the substrate by using the gate electrode 24 as a mask. After deposition of an insulation film 27 over the whole surface, this insulation film is removed by reactive etching and thus left on the side surface of the gate electrode and in its neighborhood. Source and drain regions 28a and 28b are formed, and a masking material layer 31 having the property of selective etching to the insulation film 27 is formed over the whole surface; thereafter, this masking material layer is selectively removed until the remaining insulation film 27 on the side surface of the gate electrode is partly exposed. A gap is formed between the gate electrode by selective removal of the remaining insulation film 27 using the remaining masking material layer. The third impurity layers 34a and 34b of the first conductivity type are formed by introducing an impurity to the substrate through the gap.
申请公布号 JPS6120369(A) 申请公布日期 1986.01.29
申请号 JP19840141590 申请日期 1984.07.09
申请人 TOSHIBA KK 发明人 MATSUMOTO YASUO
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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