| 摘要 |
PURPOSE:To shrink a base region by leading out a base electrode through a conductive layer from a base contact region formed to the peripheral side surface of a transistor forming region. CONSTITUTION:An SiO2 layer 12, an Si3N4 layer 13 and a poly Si layer 14 are applied successively onto a base region 3B, and an Si3N4 layer 15 and an SiO2 layer 16 are applied successively. The layers 14-16 except a transistor forming region are removed, a poly Si layer 17 is applied onto the side surface of a pattern consisting of residual layers 14-16, and the surface of the layer 17 is oxidized to shape an SiO2 layer 18. Sections up to one part of the layer 3 from the layer 13 are etched while using said pattern as a mask. An Si3N4 layer 19 is formed and a substrate is oxidized, and the layer 19 is removed and the side surface of the substrate is exposed. A conductive layer 21 is applied and connected electrically to the substrate. The surface of the layer 21 is oxidized. The layers 16-14 are removed, and a conductive layer 23 is applied to the substrate. The greater part of the layer 23 and the layers 13, 12 are etched, and an emitter window 24 is bored. |
