| 摘要 |
PURPOSE:To attain ease of semiconductor circuit integration by separating a vertical synchronizing signal from a composite synchronizing signal. CONSTITUTION:When the composite synchronizing signal is fed to an input terminal 30, a digital monostable vibrator DMM34 generates a synchronizing pulse, which is inverted and fed to a clock input C of an FF circuit 38. A discriminating output representing the presence of a vertical synchronizing signal appears at a non-inverting output Q of the FF circuit 38. In applying the discrimination output as a data input D of an FF circuit 40, since the data input D is read synchronously with the trailing edge of the composite synchronizing signal, the non-inverting output Q of the FF circuit 40 is a pulse E output and it is extracted from an output terminal 44 as the vertical synchronizing signal VD.
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