发明名称 ERROR PROTECTION CIRCUIT OF DPCM DECODER
摘要 PURPOSE:To suppress noise even with overflow due to transmission error while keeping simple constitution by providing an inverse quantizing ROM, an adder, a forecast device and a D/A converter and a circuit detecting overflow from 2 inputs and an output of the adder, replacing the adder output into a constant in response to the output of the detection circuit and applying the result to the fore case device. CONSTITUTION:Since an overlow detection output is generated thereby giving an output to a forecast device while being replaced into an upper or a lower limit when there is an error and overflow takes place, a decoded output is clipped at upper and lower limits and a jump to an opposite peak is lost, then a large noise is prevented. For example, a detected output 54 is fed to a clip circuit 6 to replace the output data of an adder 2 is replaced into an upper/ lower limit data and outputted to an analog output terminal through a forecast device 3 and a D/A converter 4. An analog output waveform is shown in waveform diagram, and even if an error takes place and the signal reaches the limits, noise generation is prevented.
申请公布号 JPS61121620(A) 申请公布日期 1986.06.09
申请号 JP19840243725 申请日期 1984.11.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 EJIMA NAOKI
分类号 H03M7/32;H03M7/38;H04B14/06 主分类号 H03M7/32
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