| 摘要 |
PURPOSE:To enable a CPU at the I/O side to receive the information from the system side with no occupation of a multi-bus, by providing an information latch means for commands stored in an I/O board. CONSTITUTION:A CPU1 at the system side, a system memory 2 and I/O boards 3 and 4 are connected to a multi-bus 5. A command latch circuit is added to both board 3 and 4 respectively. Thus a CPU in the I/O board can receive the information given to the command latch circuit with no reference to the memory 2 at the system side. |
