| 摘要 |
PURPOSE:To obtain a DA converter with high accuracy and excellent stability by adopting the constitution that the inversion of a high-order bit between adjacent values is <=1 bit to suppress an error caused by the inversion of the high-order bit conventionally. CONSTITUTION:High-order 2 bits Dn-1, Dn-2 among digital input data D0-Dn-1 are ORed by an OR gate 2 and inputted as D'n-bit via a resistor 4R, ANDed at an AND gate 4 and inputted as D'n-1-bit via the resistor 4R. On the other hand, the most significant bit Dn-1 is inputted via a resistor 2R as a D'n-2-bit. That is, in order to reduce errors at the inversion of the MSB of the input data D0-Dn-1, the high-order 2 bits Dn-1, Dn-2 are processed by using the OR gate 2 and the AND gate 4 to constitute 3 bits.
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