发明名称 ERROR DETECTING/CORRECTION FUNCTION CONTROLLING SYSTEM OF DYNAMIC TYPE MEMORY
摘要 PURPOSE:To make the detection of a data error caused by a hard error possible when performance tests are performed on a memory circuit and to make a soft error correcting function possible when the memory circuit is used by selectively setting ECC circuit functions to valid or invalid conditions through external control. CONSTITUTION:An ECC circuit function selection controlling means 6 is controlled by the detecting signal of a high-voltage detecting circuit 5 so as to selectively set the function of an ECC circuit 4 to valid or invalid. It can be exemplified as partical examples of the means 6 that a switching circuit which selectively controls the circuit connection between the ECC circuit 4 and a memory cell array 3 is provided, each of AND gate circuits 7, in which data of parity check results are inputted, is gate-controlled by means of an ECC circuit function selection controlling signal at a part of the ECC circuit 4, for example, at a corrected data implementing circuit 67, or fuse elements which selectively control the ECC circuit function in accordance with electrical fusion are provided on memory chips, and so forth.
申请公布号 JPS61134988(A) 申请公布日期 1986.06.23
申请号 JP19840256150 申请日期 1984.12.04
申请人 TOSHIBA CORP 发明人 NAKAGAWA KAORU;OGURA ISAO;NATORI KENJI;MASUOKA FUJIO
分类号 G11C29/00;G06F11/10;G11C11/401;G11C29/42 主分类号 G11C29/00
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