发明名称 TRANSMISSION ERROR PROTECTING SYSTEM
摘要 PURPOSE:To protect properly transmission line errors to reduce the delay quantity due to a continuous protecting circuit by providing a continuous protecting means and a parity check means and synchronizing plural asynchronous signals by the multipoint sampling method to perform time division multiplex transmission. CONSTITUTION:The frame constitution shown in the figure is used. A parity check circuit 11 check the parity in accordance with channel bits A-G and a parity bit P in a frame unit; and if a parity error is detected, the state of a signal line 12 is set to '0', and a frame clock is applied to an AND gate 43 through a signal line, and it is controlled by the output of the circuit 11 to stop the output to a double continuous protecting circuit 1, and the write of the frame, where the error occurs, in registers 3 and 4 is inhibited to hold the signal before the error. Thus, the signal of the error frame is excluded.
申请公布号 JPS61147628(A) 申请公布日期 1986.07.05
申请号 JP19840270376 申请日期 1984.12.21
申请人 NEC CORP 发明人 MIZUSAWA TSUNETOSHI
分类号 H04L1/00;H04L25/30 主分类号 H04L1/00
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