| 摘要 |
PURPOSE:To attain high circuit integration and to quicken the operating speed with less parasitic capacitance of each gate by providing a transfer gate above/ under a semiconductor thin film. CONSTITUTION:Transfer gates 11, 12 are provided on/under the semiconductor thin film 14. An electric charge is stored under phi1, phi2 gates at t=t1. Then an electric charge is transferred from the phi2 gate to a phi3 gate at t=t2. Since a channel stop region 17, however, exists between the phi1 and phi3 gates, the electric charge of the phi1 gate is not transferred directly to the phi3 gate. The electric charge of the phi1 gate is transferred to the phi2 gate by zeroing the applied voltage of the phi1 gate at t=t3. The signal electric charge is transferred by repeating the operation above. Thus, the circuit integration is increased. Since the parasitic capacitance of each gate is less, the operating speed is quickened.
|
