发明名称 VIDEO SIGNAL DIGITAL ENCODING AND DECODING SYSTEM AND DEVICE FOR MEMORY REPRODUCING
摘要 PURPOSE:To obtain inexpensively a video signal encoded by 1-bit-time-series digital encoding by forming a loop system with an analogue-signal comparing circuit, temporary memory circuit, and a high-pass-filter circuit. CONSTITUTION:The input video signal to be encoded is inputted to an analogue- signal comparing circuit 104 from the input terminal 1. The output from the circuit 104 is synchronous with the synchronizing signal 107 from a reference clock generator 201, and is stored in the temporary memory circuit 106. From the memory circuit 106, an encoded video signal 108 is outputted, which is supplied to a memory control circuit 203 and to a first filter circuit 109 that is of high-pass characteristic. The output from the circuit 109 is supplied to the comparing circuit 104, and thus the loop is formed. By this constitution of the loop, a digital-encoded video signal of 1-bit time series is obtained without frame memory.
申请公布号 JPS61161872(A) 申请公布日期 1986.07.22
申请号 JP19850003753 申请日期 1985.01.11
申请人 KAKUMOTO JUNICHI 发明人 KAKUMOTO JUNICHI
分类号 H04N5/14;H04N5/907 主分类号 H04N5/14
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