| 摘要 |
PURPOSE:To shorten the transfer time an to check securely the transfer by providing a flag for a bus controller in a submodule and transferring data, etc., to each processor through the action of each flag in terms of multiple address. CONSTITUTION:When a program and data are transferred to each submodule 2, with the control of a disk controller 8 a main module 1 loads a common program, etc., in a magnetic disk device 9 in a memory 6. Then the common program, etc., are loaded in the memory 6 of the module 2 through the bus controller 4 of the submodule 2. In this case flags 13-15 in the controller 4 of the module 2 are operated, whereby the common program and data are transferred in terms of multiple address. Upon the completion of the transfer the processor 5 of the module 1 checks the transfer state. If it is abnormal re-transfer is carried out. Thus the transfer time can be shortened, and the transfer of data, etc., can be confirmed. |
