发明名称 CHROMINANCE SIGNAL PROCESSING DEVICE
摘要 PURPOSE:To obtain a carrier chrominance signal without a jitter by controlling and demodulating a demodulating shaft by a negative feedback loop, and for the phase error at the time of excessive response which occurs then, rotating and removing instantaneously the vector of chrominance signal by calculation, remodulating, D/A converting and outputting, after a carrier chrominance signal, which are converted at the low area, are converted to a digital signal by an A/D converter. CONSTITUTION:When the phase error is phi for the regular chrominance signal (x and y) by making the chrominance signal having the phase error into (x' and y'), a vector (x and y) rotates a vector (x' and y') by an angle phi, and therefore, the relation of formulas I and II is realized from the formula of the rotation of the vector. When the absolute value of the burst signal vector is one, an R-Y shaft component beta is sin phi, and a B-Y shaft component alpha is -cosphi. When the relation is used for the formula I and the formula II, formulas III and IV are obtained. Consequently, inputs X and Y of an arithmetic circuit 4 are respectively x' and y' in a formula III and a formula IV, calculation is executed in accordance with the formula III and formula IV at the arithmetic circuit 4, symbols -Xa-Yb and Xb-Ya are outputted, thereby removing the phase error.
申请公布号 JPS61184992(A) 申请公布日期 1986.08.18
申请号 JP19850024810 申请日期 1985.02.12
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUMOTO TOKIKAZU
分类号 H04N9/84;H04N9/89 主分类号 H04N9/84
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