发明名称 STORAGE DEVICE
摘要 PURPOSE:To avoid a useless case where the nondefective areas within each memory area are inapplicable equally owing to the generation of a 1-bit error, by providing a means which sets an access to a substitute memory area only when uncorrectable error is detected. CONSTITUTION:A microinstruction contains a 2-bit error detection/1-bit error correction code. An error control circuit 6 invalidates the microinstruction within a microinstruction register 5 when an uncorrectable 2-bit error is detected. An access control circuit 3 receives an error generating address and writes the using inhibition information to the corresponding area in a control information memory 2. Then the circuit 3 reads again a microinstruction group stored in a fault generating area in a control memory 1 out of a main memory and writes it into a substitute memory area C in the memory 1. When a reading action is started, the using inhibition information is supplied to the memory 1 from the memory 2. Then the accesses are invalidated to areas A0- and at the same time the access to the area C is validated.
申请公布号 JPS61253565(A) 申请公布日期 1986.11.11
申请号 JP19850095784 申请日期 1985.05.04
申请人 NEC CORP 发明人 SANO MASAAKI;ITO YUKIO
分类号 G06F11/16;G06F12/16 主分类号 G06F11/16
代理机构 代理人
主权项
地址