| 摘要 |
PURPOSE:To enable a processor to give accesses to a buffer memory and a peripheral LSI without using a complicated program nor hardware, by providing a latch and a tristate gate to a data bus converter. CONSTITUTION:A micro processor 1 which performs the data processing is connected to an n-bit data bus 6. While a buffer memory 3 and a peripheral device 4 are connected to a 2n-bit data bus 7. Then a data bus converter 5 is connected between both buses 6 and 7. The converter 5 contains a latch and a tristate buffer. A control circuit 2 controls the converter 5 based on the address information and the control information given from the processor 1 via a signal line 8.
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