INSPECTING METHOD FOR SEMICONDUCTOR DEVICE

摘要

PURPOSE:To enable the measurement of potential information of lower layer wirings of a semiconductor integrated circuit of multilayer wiring structure without occupying the excess space without aging change of the secondary electron signal due to a charge-up of an interlayer insulating film due to an EB emission by adding a measuring electrode pattern to the existing wiring forming mask. CONSTITUTION:A measuring electrode pattern 7 is formed by the second layer wiring mask on an interlayer insulating film 3 on the first layer wirings 1. An EB is emitted to the pattern 7 to measure the potential and the waveform of the first layer wirings 1 from the pattern 7 by performing a role of one type of capacitor with an interlayer insulating film 8 under the pattern 7. Since the EB is emitted to the pattern 7, the charge-up of the film 8 under the pattern 7 does not occur, and the potential change of the wirings 1 can be obtained from the pattern 7 irrespective of the EB emitting time.