首页
产品
黄页
商标
征信
会员服务
注册
登录
全部
|
企业名
|
法人/股东/高管
|
品牌/产品
|
地址
|
经营范围
发明名称
SYSTEM FOR DISPLAYING LOGICAL RESULT ON LOGIC CIRCUIT DIAGRAM
摘要
申请公布号
JPS6232565(A)
申请公布日期
1987.02.12
申请号
JP19850172918
申请日期
1985.08.05
申请人
SUMITOMO ELECTRIC IND LTD
发明人
KANEKO TAKASHI
分类号
G06F17/50
主分类号
G06F17/50
代理机构
代理人
主权项
地址
您可能感兴趣的专利
PYRIDONE-PYRIDYL-IMIDAZOLYL AND TRIAZOLYL COMPOUNDS AND THEIR USE AS CARDIOTONIC AGENTS
VORRICHTUNG ZUM ZUFUEHREN VON ZERKLEINERTEN KUNSTSTOFFOLIENABFAELLEN O.DGL. ZU DEM AUFGABETRICHTER EINES EXTRUDERS
METHOD AND APPARATUS FOR INDUCTING GASES INTO LIQUID AND/OR REACTING SAME
PLANT FOR WATER TREATMENT, PARTICULARLY FOR THE BIOLOGICAL PURIFICATION OF SEWAGE
PHASE LOCKED OSCILLATION CIRCUIT
STORAGE DEVICE FOR TRANSLATION AMONG MANY LANGUAGES
REALIZING MEANS FOR COMPILER
AMPULE FOR GROWING SINGLE CRYSTAL
SOLID-STAGE IMAGE PICKUP DEVICE
WORK PROCESSOR
EXHAUSTING METHOD
METHOD FOR ATTACHING FRAME
CHITOSAN MICROPARTICLE
SOLID-STATE COLOR TELEVISION CAMERA
NOISE SUPPRESOR FOR TELEVISION SIGNAL
COIN COUNTING/PROCESSING MACHINE
TRANSFERRING METHOD
ACTIVE TRANSCONDUCTANCE FILTER DEVICE.
HYDRERINGSINNRETNING.
BROENNLOGGEVERKTOEY MED NOEYTRONKILDE AV AKSELERATOR-TYPE.