发明名称 Delay circuit for inverter switches
摘要 Transistors or GTO's of an inverter are switched ON/OFF with a delay circuit which has a capacitor first charged at a forcing rate, then, held at an intermediary level, and which is first discharged at a forcing rate, then held at an intermediary level, thereby to provide underlap, minimum ON and OFF time control and noise filtering with a high precision.
申请公布号 US4651270(A) 申请公布日期 1987.03.17
申请号 US19850795398 申请日期 1985.11.06
申请人 WESTINGHOUSE ELECTRIC CORP. 发明人 EDWARDS, CHARLES W.
分类号 H02M7/525;H03K5/13;H03K17/292;(IPC1-7):H02P13/20 主分类号 H02M7/525
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