发明名称 Transistor fault tolerance method and apparatus
摘要 A power transistor control circuit for controlling the bias input to the power transducer. During normal operations two switching transistors bias the base input to a power transistor positively and negatively to turn the power transistor on and off. By back biasing a conducting transistor, however, the blocking voltage capability of the transistor is diminished. To maintain blocking voltage at a maximum, the present circuit senses overcurrent conditions indicating a problem condition exists and turns off the power transistor by neutrally biasing a base input. Preferably, both switching transistors used to bias the base input during normal operation of the transistor are rendered nonconductive to accomplish this neutral biasing.
申请公布号 US4651252(A) 申请公布日期 1987.03.17
申请号 US19850717335 申请日期 1985.03.29
申请人 EATON CORPORATION 发明人 BABINSKI, THOMAS E.
分类号 H03K17/082;(IPC1-7):H02H3/08 主分类号 H03K17/082
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