| 摘要 |
PURPOSE:To improve the step-covering feature by a method wherein sand- etching is accomplished as the result of which a lower wiring metal layer is made smaller than an upper wiring metal layer in a wiring pattern forming process. CONSTITUTION:A two-layer structure is built of lower and upper layers 2a and 2b formed of different metals on the entire surface of a semiconductor substrate 1. Next, a resist pattern 3 for wiring is formed, after which the upper and lower wiring metal layers 2a and 2b are in that order subjected to selective etching. The resist pattern 3 is then removed. When an interlayer insulating film 4 is formed, the upper wiring metal layer 2b is pushed from above by the stress present in the interlayer insulating film 4, which results in a first wiring layer 2 with its cross section free of sharp angles. Next, a second wiring layer 5 is built.
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