| 摘要 |
PURPOSE:To attain the fast operation of a loop containing cache memory by providing a cache memory for each type of the running programs and inhibiting the input of the data read out of another program into a cache memory. CONSTITUTION:A processor 10 contains cache memories 12A and 12P and index tables 13A and 13P showing the areas of a main memory 11 where the data S and T in the memories 12A and 12P are stored. The data information S and T used by programs A and P are stored in the cache memories 12A and 12B respectively. Therefore the processor 10 has only to retrieve the relevant data information within the memory 12A only as long as the program A is kept running. If the data information is not detected within the memory 12A, the processor 10 reads it out of the memory 11 by means of the table 13A.
|
