发明名称 CACHE MEMORY SYSTEM
摘要 PURPOSE:To prevent the performance of the cache memory of a multiple virtual storage system from deteriorating by dividing the cache memory into an application program area and a memory area where the information of a supervisor area is stored, and providing a clear means. CONSTITUTION:The cache memory part 36 is divided into the application program part 36a and supervisor part 36b, and cache control parts 25a, 25b and 26a, 26b, replacement control parts 33 and 34, timing circuits 41 and 42, and clearing means for a V bit are provided corresponding to the respective parts. When the application program part 36a or supervisor part 36b is accessed, the operation of the cache memory system is switched with status signals S0 and S1 outputted by a processor 1. The replacement control parts 33 and 34 discriminate access to their own areas with the status signals S0 and S1 to perform replacement control. When tasks are switched, a task control system performs a purging process for the application program part 36a.
申请公布号 JPS62145342(A) 申请公布日期 1987.06.29
申请号 JP19850287007 申请日期 1985.12.20
申请人 FUJITSU LTD 发明人 HASHIMOTO SHIGERU
分类号 G06F12/08;G06F12/10 主分类号 G06F12/08
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