发明名称 Data communication system and method and communication controller and method therefor, having a data/clock synchronizer and method
摘要 A communication system and method is provided, in which synchronous (i.e., clocked) serial digital data may be sent and received from any given node to any other given node along a multinode loop of any desired mode quantity, with each node being capable of and maintained ready to assume the role and function of master node to provide the time-base or master clock for the loop. One node will serve as master node and all other nodes as slave nodes until the master becomes inoperable in its master clock function or until it is removed from the loop, at which time another node will assume the role of master node, and this status will continue as above-indicated. Small loop size is accommodated by adding a suitable delay to retransmitted data at the master node. Each node has clock recovery and both recovered clock/data synchronization means and its on-board master clock/data synchronization means (which latter is close to the same frequency at each node, but independent in frequency and phase at each node) to enable each node to serve as either master or slave node by internal switching selection of communication control output of either recovered clock data or master clock data for use and retransmission at each node, dependent on its instant self-intended role as slave or master. Master clock data synchronization at the master node is effected by shifting recovered clock data by a selected phase as a function of phase difference between the instant master node master clock and recovered clock at such master node, the selected phase shift being an amount sufficient to enable effective sampling by the master clock, to thereby provide absolute phase synchronization of receive data with master clock for internal serial processing, utilization, and retransmission by the instant master node. Each instant slave node has its own on-board such master clock data synchronizing means which may be maintained on standby, for enabling each assumption of the master node role, as may be required.
申请公布号 US4677614(A) 申请公布日期 1987.06.30
申请号 US19830466560 申请日期 1983.02.15
申请人 EMC CONTROLS, INC. 发明人 CIRCO, MILES M.
分类号 H04J3/06;H04L7/033;H04L12/42;H04L12/433;(IPC1-7):H04J3/06 主分类号 H04J3/06
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