50% duty cycle relaxation oscillator with latch-up prevention circuit

摘要

An oscillator circuit is disclosed in which a charging path is provided through a charging transistor and a discharging path is provided through a discharging transistor. Both the charging path and discharging path are directed through a first and second terminal for connection across a timing resistor to allow for reliable 50% duty cycle operation. A diode is provided between a voltage limit setting circuit and a second diode. The second diode is connected to the base of a buffer transistor. The buffer transistor turns the discharging transistor on and off. The two diodes provide a delay between the time in which the voltage limit setting circuitry changes the voltage limit and the switching of the discharging transistor to prevent latch-up.