发明名称 Emitter coupled logic circuit with high drivability for capacitive load
摘要 An ECL (Emitter Coupled Logic) circuit is provided which has an increased ability to drive a large capacitive load or to drive a large fan-out circuit, wherein the power consumption per gate is reduced. The output circuit of the ECL circuit is provided with an emitter follower transistor which has the current therethrough detected by a detecting transistor. A current control transistor is provided to quickly charge the load capacitance under the control of the detecting transistor, and thus, the voltage drop of the output signal is improved. One of the emitter follower transistor and the current transistor are always cut off when the other is in a conductive state, and therefore, the current running through the circuit is reduced.
申请公布号 US4678942(A) 申请公布日期 1987.07.07
申请号 US19850779356 申请日期 1985.09.23
申请人 FUJITSU LIMITED 发明人 KANAI, YASUNORI;SAITOH, TAICHI
分类号 H03K19/00;H03K19/01;H03K19/013;H03K19/0175;H03K19/018;H03K19/086;(IPC1-7):H03K19/01 主分类号 H03K19/00
代理机构 代理人
主权项
地址