| 摘要 |
PURPOSE:To attain high-speed reading by short-circuiting paired data lines of a memory tentatively by one-shot signal and short-circuiting tentatively paired output lines of a C-MOS FET sense amplifier at the same time. CONSTITUTION:MOS transistors (TRs) M3, M4, M9, M10, M15, M16 are turned on by one-shot signals phiP, the inverse of phiP generated at the catching of the transition of an address signal to short-circuit between paired data lines D, the inverse of D, between paired differential amplifier input A, B and between paired differential outputs C, E respectively. In this case, TRs M23, M24 are turned off and M29, M30 are turned on, then clocked inverters M28-M31 are activated, clocked inverters M22-M25 are inactivated to hold the information before the generation of the signals phiP, the inverse of phiP. Thus, the quick response to the input signal is attained and the entire read is quickened.
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