发明名称 ADDRESSING SYSTEM FOR EXTENDED MEMORY
摘要 PURPOSE:To avoid the superposition between the address of an extended memory and the address of an existing memory or another extended memory, by setting the address of the extended memory so that it does not overlap the most significant address and down of an existing memory. CONSTITUTION:The address space of a CPU 1 is set at 1MB and the address lines A0-A16 of low-order 17 bits are connected directly to a memory among those connected address lines A0-A19. While the address lines A17-A19 of high-order three bits are connected to a decoder 2. The decoder 2 extends an address of three bits to the one of 8 bits and this extended 8-bit address is inputted to eight extended address latch circuits 3a-3h respectively from the decoder 2. These circuits 3a-3h are connected to the memory via the extended address lines A17-A23. Therefore, a memory space of 16MB can be addressed although the address space of the CPU 1 kept at 1MB. As a result, the address of an extended memory never overlaps the addresses of an existing memory, etc. and therefore the data transmitting efficiency is improved.
申请公布号 JPS62241048(A) 申请公布日期 1987.10.21
申请号 JP19860083402 申请日期 1986.04.11
申请人 ALPS ELECTRIC CO LTD 发明人 MIYAKOSHI TOSHIAKI
分类号 G06F12/06 主分类号 G06F12/06
代理机构 代理人
主权项
地址
您可能感兴趣的专利