发明名称 DELAY CIRCUIT FOR VIDEO SIGNAL
摘要 PURPOSE:To obtain the titled circuit with ease of mount and without the deterioration of picture quality and the limitation of transmission band by binarizing the amplitude of an input FM video signal to form a rectangular wave signal, forming a pulse signal representing its leading and trailing and retarding the pulse signal by pulse delay circuits connected in series in multistage. CONSTITUTION:An inputted reproducing signal is divided into two, one is fed to an equalizing circuit 1 and the other is fed to a speech processing circuit. The audio FM signal is eliminated from the signal inputted to the circuit 1 by a PF 2, its output is inputted to a limiter 3 and the amplitude level is binarized as a rectangular FM signal. A pulse signal representing the edge timing of the leading/trailing of the output signal is formed. The pulse signal is given to a pulse delay circuit 6 whose delay time is varied by a jitter control signal, and a video signal is obtained from an LPF 7.
申请公布号 JPS62273671(A) 申请公布日期 1987.11.27
申请号 JP19860114535 申请日期 1986.05.21
申请人 HITACHI LTD 发明人 OKU MASUO
分类号 G11B20/06;H04N5/95;H04N5/953 主分类号 G11B20/06
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