| 摘要 |
PURPOSE:To decrease the scale of a hardware by constituting the titled device not by a ROM but by a simple programmable logic array (PLA). CONSTITUTION:The logic is deviced between terminals b0, b1...b7 and a0, a1...a7 of an exclusive OR (EOR) 1 so as to establish the relation of a1=b0+b2+b4, a2=b0+b3+b4+b6, a3=b1+b2+b3+b4, a4=b0+b7, a5=b1+b2+b3+b4, b6, a6=b0+ b1+b2+b4, b7, a7=b0+b1+b2+b4. Thus, X=SIGMA aialpha<i> (i=0 to 7) with b5=0 is a root of a quadratic equation X<2>+X+B=0 (B=SIGMA betaialpha<i>(i=0 to 7)). Thus, the root of quadratic equations is formed by a simple logic. Furthermore, the scale of the hardware is less and this system is suitable for large scale integration.
|
