| 摘要 |
PURPOSE:To evaluate only dynamic nonlinearity by giving the sequence of digital data to a D/A converter as the evaluation object in synchronism with clocks and sampling the output in synchronism with clocks. CONSTITUTION:The sequence of digital data is given to a D/A converter (DAC) 13 as the evaluation object in synchro with a clock signal fc, and the output of the DAC 13 is sampled by a sampling digitizer 15 in synchronism with the clock signal. The timing of this sampling is delayed by the DAC settling time than the generation timing of input data given to the DAC by a delay generator 19. The dynamic linearity of the DAC is obtained in accordance with a series of sampling data obtained in this manner input data corresponding to them.
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