发明名称 PATROL CHECK SYSTEM FOR CONTROL MEMORY
摘要 PURPOSE:To prevent the reduction in processing speed of a device body by performing the patrol check of a control memory to detect and restore soft errors while a waiting a processing request. CONSTITUTION:If a microinstruction for reading an attention register 10 in an idle loop is executed, the microinstruction is executed in two machine cycles. When the microinstruction is executed and a control signal 13 is outputted, a control signal obtained by logically differentiating the control signal 13 in one cycle is generated in a clock circuit 7. As the result, a control memory 1 is accessed by the address outputted from an address register 4 to set contents of the address to a pipeline register 2, and the parity check is performed, and the patrol check of the address is executed. Thus, a microprogram is loaded again from an external device if the parity error is detected.
申请公布号 JPS63142449(A) 申请公布日期 1988.06.14
申请号 JP19860290765 申请日期 1986.12.04
申请人 FUJITSU LTD 发明人 INAUCHI HIDEYOSHI
分类号 G06F9/22;G06F12/16 主分类号 G06F9/22
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