发明名称 ECHO CANCELER
摘要 PURPOSE:To omit a circuit having rapid processing speed by equally diving the tap strings of a delay signal generating circuit, a tap factor generating circuit and a tap factor correcting circuit into the prescribed number of groups and executing the delay compensation operation of one sampling. CONSTITUTION:A timer circuit divides respective tap strings of the delay signal string generating circuit 1, the tap factor string generating circuit 2 and the tap factor string correcting circuit 4 equally into the prescribed number of groups so that respective groups are to be computed by an arithmetic circuit 3. One-sampling compensating operation is executed in each tap string group, respective tap factor string groups obtained from the circuit 2 are mutually compared by a comparison control circuit 6 and the highest tap factor string group in the tap factor strings is detected to fixedly execute the delay compensa tion of the maximum tap factor string group.
申请公布号 JPS63164538(A) 申请公布日期 1988.07.07
申请号 JP19860314448 申请日期 1986.12.25
申请人 FUJITSU LTD 发明人 YAMADA HIROSHI
分类号 H04B3/23 主分类号 H04B3/23
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