发明名称 COMPOUND ARITHMETIC CIRCUIT
摘要 PURPOSE:To simplify the scale of a circuit by providing three selectors, selecting each selector, and omitting a multiplier. CONSTITUTION:ALU 30-37 which respectively associate with bits b0-b7 showing a coefficient alpha supplied from a memory (MEM) 1 through a bus bar 2 and form a computer element (ALU) array 3 are provided. The first and the second selectors (SEL) 40-47 and 50-57 are provided at first and second input joints of every ALU 30-37 and these selectors select the real numbers X1-X7 of and Y1-Y7 of them at an accumulation time and at an estimation time, they select the associated bits among accumulation values A from a bus bar 6 and the bits b0-b7 which show the coefficience alpha given from the bus bar 2 and input to each ALU 30-37. Thus the accumulation and the multiplication are executed in the same circuit, and the multiplier is not needed to provide.
申请公布号 JPS63163674(A) 申请公布日期 1988.07.07
申请号 JP19860308840 申请日期 1986.12.26
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 MINAMI TOSHIHIRO;YAMAUCHI HIROKI
分类号 G06F17/10 主分类号 G06F17/10
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