发明名称 LINEAR POWER AMPLIFIER
摘要 PURPOSE:To realize the amplification with high efficiency without causing any switching distortion by introducing the digital processing in switching the power voltage of a power amplification stage according to the amplitude of an input signal in an amplifier amplifying the input signal while applying D/A conversion. CONSTITUTION:A digital input signal Sd is formed into an analog signal Sa after passing through a delay circuit 11 and fed to a power amplifier stage 15. Rectifier circuits 24, 25 output respectively positive/negative voltages VH, VL and -VL, VH. The MSB and 2SB of the signal Sd are fed to AND circuits 41, 51 for detecting the amplitude and AND outputs Sp, Sn are obtained. Since the signal Sd is an offset binary code, the relation between the value of the signal Sd and the amplitude of the signal Sa, the relation between the signals Sp, Sd and between the signals Sn, Sd are as shown in figure (a). In a switching circuit 31, a voltage VL or VH is supplied to a transistor Q1 as the operating voltage with Sp='0' and '1' and a switching circuit 32 is operated similarly with Sn='0' and Sn='1'. Thus, the voltage +VH or -VH is supplied to the amplifier stage 15 only with Sa>=4 and Sa<=-5. Moreover, since the voltage switching is not delayed with respect to the signal Sa in the amplifier stage 15 because of the intervention of the delay circuit 11, no distortion is caused at switching.
申请公布号 JPS63173409(A) 申请公布日期 1988.07.18
申请号 JP19870005458 申请日期 1987.01.13
申请人 SONY CORP 发明人 MORIOKA SUSUMU
分类号 H03F1/02 主分类号 H03F1/02
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