| 摘要 |
PURPOSE:To use the data of a ROM at an initial time and afterwards to use the data of a RAM as updating it, by attaching the same address on the ROM and the RAM, and connecting and controlling both of them with a gate circuit. CONSTITUTION:A fixed memory (ROM)1 and a variable memory (RAM)2 are provided, and the addresses of them are set as the same number. The gate circuit 3 is inserted between the respective data terminal D of the ROM1 and the RAM2. Also, the gate circuit 5 is inserted between the data terminal D of the RAM2 and a data bus 4. A processor 6 sends out an address designation signal SAD via an address bus 7, thereby, the addresses for the ROM1 and the RAM2 are designated. Next, the processor sends out a chip select signal, a ROM designation signal, and a read/write signal, and controls the operating status of the ROM1 and the RAM2, and the gates 3 and 5.
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