发明名称 PULSE COUNTING DEVICE
摘要 PURPOSE:To perform a natural display having no regularity by providing an adder, a comparator, a display circuit, an addition value deciding circuit, etc. CONSTITUTION:The adder 8 sums counted values of all registers and outputs the latest calculated sum to the comparing circuit 9. This comparator 9 compares the latest sum with a value which is equal to a value outputted from the comparator 9 to a display circuit in a previous division time and stored in a register 11 for storage. At this time, when the difference between the value outputted from the comparator 9 to the register 11 and the latest sum is <='3', the latest sum is outputted to the circuit 10 as it is. When the difference is >='4', the comparator 9 corrects or does not correct the latest sum from the adder according to the output signal of the addition value decision circuit 12 to the comparator 9. Thus, a natural display having no regularity is executed.
申请公布号 JPS63188771(A) 申请公布日期 1988.08.04
申请号 JP19870020986 申请日期 1987.01.31
申请人 NIPPON SEIKI CO LTD 发明人 YANAIDA YOICHI
分类号 G01P3/489 主分类号 G01P3/489
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