| 摘要 |
PURPOSE:To quickly transmit and receive data to and from an external I/O by providing a direct memory access (DMA) circuit and directly transmitting and receiving data to and from the external I/O through a data bus. CONSTITUTION:In case of data transmission and reception between external I/Os 4 and 5 and memories 8 and 9, I/Os 4 and 5 first output signals a11 and a21, which indicate that data transmission and reception are started, to DMA circuits 6 and 7. Circuits 6 and 7 outputs signals a12 and a22, which stop the operation of microcomputers 1 and 2, to microcomputers 1 and 2. Computers 1 and 2 return data transmission/reception permitting signals a13 and a23 for I/Os 4 and 5 to circuits 6 and 7 and stop their own operations, and simultaneously, a collating circuit 3 stops the operation. Next, signals a14 and a24 for direct data transmission/reception between I/Os and memories are outputted from circuits 6 and 7, and data is directly transmitted and received between the circuit 4 and the memory 8 and between the circuit 5 and the memory 9 through data busses A and B. Thus, data transmission to and reception to and from external I/Os 4 and 5 are quickly processed.
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