发明名称 SYSTEM FOR EXTENDING ADDRESS OF INPUT/OUTPUT PROCESSING
摘要 PURPOSE:To perform the continuous transfer of a data with an extended real memory, by providing a channel command word address register and a data address register in a channel device, and updating respective content by a channel command word specified respectively. CONSTITUTION:In the channel device, first channel command word (CCW) which designates an address space of 2<n+m> bytes as the channel command word, and second CCW which designates an extended address of of 2<m>, are prepared. In the channel device, the channel CCW address register (CAR)170 of (m+n)-bits which designates the storage position of the CCW and the data address register (DAR)130 of (m+n)-bits which designates a data transfer address are provided. The content of the CAR170 is updated by the first CCW. The high-order (m) bits of the DAR130 is updated by the second CCW, and the low-order (n) bit of the DAR130 is updated by the CCW being linked to the CCW. Thus, it is possible to perform a data transfer processing linked to an extended real memory.
申请公布号 JPS63206848(A) 申请公布日期 1988.08.26
申请号 JP19870039907 申请日期 1987.02.23
申请人 HITACHI LTD 发明人 NINOMIYA KAZUHIKO
分类号 G06F13/12 主分类号 G06F13/12
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