| 摘要 |
PURPOSE:To make only an error of a 2nd D/A converter D/A-converting a corrected low-order n-bit resident by correcting the low-order n-bit of a digital data by an error of a 1st D/A converter stored in a memory corresponding to a high-order m-bit digital data. CONSTITUTION:The 1st D/A converter 6 D/A-converting the high-order m-bit of a digital data, a storage circuit 3 storing an error data of the output of the 1st D/A converter from an ideal value, a digital arithmetic circuit 4 correcting the low-order n-bit of the digital data by the erroneous data stored in the storage circuit 3, the 2nd D/A converter 5 D/A-converting the output of the circuit 4, and a weighted adder 7 adding outputs of the 1st and 2nd D/A converters while weighting high/low-order, are provided. Even if the accuracy of the 1st and 2nd D/A converters is low, the D/A conversion with high accuracy and high bit where the error of the 1st D/A converter is eliminated is realized.
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