发明名称 IC PACKAGE
摘要 PURPOSE:To implement low impedance, by constituting bed parts, on which an LSI is mounted, in the main body of a package in two or more layers, electrically insulating the layers, and providing capacitive coupling in the main body of the package. CONSTITUTION:Bed parts 20-23 in (n) layers are provided at the upper part of the center of a package main body 11. The layers of the bed parts are isolated with insulating layers 30-32. Capacitors are formed at the bed parts of the layers 20-23 through the insulating layers 30-32. Thus capacitive coupling is provided. Thd bed of each layer is directly connected to separate input and output pins (power source pins) such as pins 12 and 13 and connected to the outside. For example, when the bed parts comprise two layers, two power source pins are prepared. For three layers, three pins are prepared. For four layers, four pins are prepared. The bed of each layer is connected to the dedicated power source pin. On the bed of the first layer, e.g., an LSI 16 is mounted. The LSI 16 is covered with a cap 14.
申请公布号 JPS63228648(A) 申请公布日期 1988.09.22
申请号 JP19870061251 申请日期 1987.03.18
申请人 TOSHIBA CORP 发明人 MINAGAWA TSUTOMU
分类号 H01L23/12 主分类号 H01L23/12
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