| 摘要 |
PURPOSE:To reduce the number of components of the titled circuit by providing at least one or over of logic gates between 1st and 2nd switching elements as a data storage means of a master section and a closed loop circuit comprising logic gates between the 2nd switching element and the output terminal as the data storage means of a slave section. CONSTITUTION:A final input data D1 for a period T1 is stored in a parasitic capacitance C in a master section. Since a clock phi goes to L at a period T2, a transfer gate 12 is conductive and gates 11,13 are nonconductive and a data D1 is outputted to an output QA through inverters 15, 16 and 18. The value of the output QA is stored by an electric charge stored in the parasitic capacitance C existing in the master section for a period T2. Then the operation for the periods T1-T2 is repeated similarly. Thus, since the means utilizing the electric charge stored tentatively in the parasitic capacitance in the logic gate with respect to the data storage in the master section is used, number of components is reduced.
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